IT3282E – Computer Architecture: Content and References

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Prof. Gerald Sobelman

Author: Prof.  Gerald Sobelman (University of Minnesota)

Research Area: Computer Engineering, VLSI, and Circuits

Website: http://ece.umn.edu/directory/sobelman-gerald/

Slides and Verilog files

Slides

  1. Adders
  2. FloatingPoint
  3. MultiplierBooth
  4. MultiplierBaughWooley
  5. VerilogExamples
  6. WallaceTrees
  7. FloatingPointSolutions
  8. FloatingPointProblems
  9. TextbookInformation (19/05/2017)
  10. AdditionalExamReviewProblems (22/05/2017)
  11. AdditionalExamReviewSolutions (22/05/2017)
  12. ExamReviewProblems  (22/05/2017)
  13. ExamReviewSolutions  (22/05/2017)
  14. CacheMemories (new, 25/05/2017)
  15. NotesOnPipelines (new, 25/05/2017)
  16. PipelineHazards (new, 25/05/2017)

 Verilog Files for Simulation

Module

  1. booth16f      (view RTL)
  2. ks                  (view RTL of kogge stone, view RTL of opo)
  3. mult3           (view RTL)
  4. mult4bw      (view RTL)
  5. ripple           (view RTL of rca, view RTL of fulladder )
  6. fpmult         (view RTL)

Testbench

  1. tb1         (view screenshoot)
  2. tb1ks     (view screenshoot)
  3. tb2ks     (view screenshoot)
  4. tb3         (view screenshoot)
  5. tb5
  6. tb7
  7. tb9bw
  8. tb16
  9. tbe

 

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